“Nanoscale Interfacial Engineering to Grow Ge on Si as Virtual Substrates and Subsequent Integration of GaAs” by Dr. Sang Han, University of New Mexico

WHEN:
September 27, 2011 3:30 pm - September 27, 2011 4:30 pm
WHERE:
CPE 2.218
Phone: 512-471-5238
200 E. Dean Keeton St., Austin, TX, United States, 78705 Google Map

Headshot of Dr. Sang  Han of the University of New MexicoSeminar Abstract:

High-quality Ge-on-Si (GoS) heterostructures have been actively pursued for many advanced applications, including near-infrared photodetectors, high-mobility field effect transistors, and virtual substrates for integrating III-V multijunction solar cells.  However, growing epitaxial Ge on Si poses many engineering challenges, ranging from lattice mismatch, to thermal expansion coefficient mismatch, to non-planar morphological evolution.  The lattice mismatch between Ge and Si often leads to a high density of threading dislocations.  These dislocations, if not reduced, propagate through the subsequently grown GaAs layer, deteriorating its quality.  To overcome these engineering challenges, we have developed a growth technique based on molecular beam epitaxy (MBE), which utilizes a very thin chemical SiO2 template with controllably spaced nanoscale windows.  Since the Ge beam naturally opens up the nanoscale windows without the use of high-resolution lithography, we have dubbed the self-templating growth technique as Ge “touchdown” on Si.  To date, we have established reasons for relieving the strain density at the Ge-Si interface that lead to a low dislocation density (< 106 cm-2).  We have also elucidated the overall reaction mechanism and kinetic rates/barriers responsible for the touchdown process.  The scalability of this growth technique has also been demonstrated on 2-inch-dimater off-cut Si wafers, which eliminates anti-phase domains (APD) in the subsequently grown GaAs layer.  To illustrate the quality of our engineered GoS substrates, the photoluminescence as well as cathodoluminescence intensity from a GaAs/AlGaAs/GaAs stack grown on GoS substrates shows a comparable level to that on GaAs substrates.  In this presentation, I will describe the details of our findings and present other growth techniques recently developed in our laboratory to effectively terminate dislocations and relieve thermal stress.  I will also discuss their implications in further improving the quality of lattice-mismatched epilayers grown on Si.

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